Computer
Structure
מבנה מחשבים
0368-2159-01/02 Spring 2010-11
Lecturers:
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Teaching Assistant - Wednesday:
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noabenamos@gmail.com
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Teaching Assistant - Thursday:
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Hillel.avni@gmail.com
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Administration & Messages
Mailing List Yedion
TARGILIM (homework) Homework grade calculation: To get the full grade on
the homework you have to submit **ALL** the exercises. The homework grade will be the average of all
of them.
Lectures:
Monday
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13:00-16:00
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Orenstein
103
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Wednesday
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14:00-17:00
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Dan
David 003
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News and Updates
Suggested Books
·
Course summary and past tests can be found on the students page
·
For the first part of the course: V. C. Hamacher,
Z. G. Vranesic, S. G. Zaky Computer Organization. McGraw-Hill,
1982
- H.
Taub Digital Circuits and Microporcessors.
McGraw-Hill 1982
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Older course book for the first part of the course: H. Taub
Grades:
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Final Exam 80%
·
Exercises 20% (5 exercises)
Course Outline (Some
changes from last year will follow):
a.
An introduction to the course
b.
What is it Computer Structure?
c.
The importance of Instruction sets
d.
Memory hierarchies
e.
Technological forces driving computer structure
f.
Silicon -> Transistors -> logical gates
g.
Implementing basic logical circuits from CMOS transistors
a.
Binary, Octal and Hexadecimal number systems
b.
Bases transfer of integers and fractions
c.
The one's complement and two's complement
d.
Representation of signed numbers
a.
Logical variables and functions
b. The OR,
AND, NOT functions
c.
Boolean Algebra Theorems
d. De'Morgan's Theorem
e. The XOR, NAND and NOR functions
a.
Simplification of Logical functions using Boolean Algebra Theorems
b.
Simplification using Karnaugh Maps
c.
Circuit implementation
d.
The Don't care utility for function
minimization
a.
Decoders and
Encoders (mux)
b.
Introduction
to VHDL
a.
A latch with NAND gates
b.
The need for latch and synchronization
c.
Clocked FF
d.
Truth table and timing diagram for a FF
e.
Two phase clocking and the Master/Slave RS FF
f.
The JK FF, D and T flip-flops
g.
Shift registers
a.
Serial to parallel
b.
Parallel to serial
c.
Serial implementation of a full adder
d.
Counters and dividers
e.
Ripple counter and a synchronous counter
f.
Non-binary counters
c.
The state and transition diagrams
d.
Mealy circuits
e.
A sequence detector
f.
Elimination of redundant states
g.
Review VHDL
a.
The MIPS R2000 Assembly Language
a.
Instructions' representation in the computer
b.
Addressing modes
c.
Compiler, linker, loader
d.
RISC vs. CISC
a.
Execution
phases
b.
Building a
CPU from basic components
c.
A simple implementation scheme: data path and
control
d.
The problems of single cycle.
a.
Pipelined datapath
b.
Pipelined control
c.
Pipelined Architecture - Hazards detection and resolution
d.
Nops and bubbles
e.
Forwarding
f.
Branch hazards
b.
Supplementary material:
a.
Implementation
b.
Control unit
a.
Flip-Flops
review
b.
Finite State
Machine Design, Moore and Mealy,
c.
PLA, ROM
d.
Microprogramming, Exceptions and Interrupts
Past
Exams
The
following exams do not necessarily indicate what questions will be in this year
exam.
In
addition or instead of the traditional questions there will be questions on:
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Transistors
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A/D
*(Note that since last year VHDL
has been added and is an integral part of the course.
Additional material:
Past guest talks:
In this lecture
we will give a brief overview of the ingredients of modern processor
micro-architecture in general and will describe its usage in the Intel Pentium
II/III processor family. As time
permits, we will discuss the aspects of power and energy in novel processors
and will show how it is reflected in the new Intel Pentium M Processor.
Ronny Ronen is
a Senior Principal Engineer/Researcher and the director of the Intel's
Microprocessor Research Lab in Haifa, Israel, focusing on microarchitecture
research. Ronny was heavily involved in
the definition stages of the Intel Pentium M processor. He has been with Intel for 22 years. Earlier in Intel he led the compiler and
performance simulation activities in the Intel Israel Software department. Ronny received his M.Sc. degree from the
Technion, Israel Institute of Technology in 1979.
Modern
Intel Only
relevant slides in Black & White version and Pentium
M