School of Computer Science

Computer Structure  

0368-2159

Semester א, תשס"ו   2005-6 (Winter)

Lecturers:

Yehuda Afek

 afek at tau.ac.il

 

Nathan Intrator

 nin at  post.tau.ac.il

Teaching Assistant

Ori Shalev

 orish  at post.tau.ac.il


Please remember to fill Evaluation Reports for Both Teachers


Administration & Messages

Solutions for the Exam from Feb 25:  Full Exam, Quest 2, Quest 1,5

Past Exams: 2004, 2005A, 2005Ab  

TARGILIM (homeworks) Home work(s) grade calculation: To get the full grade on the home works you have to submit **ALL** the exercises.  The home works grade will be the average of all of them.

Lectures:

Tuesday

10:00-13:00 

Orenstein 111

Wednesday

10:00-13:00  

Orenstein  103


Intel 2004 announcement               

Suggested Books

·         For the first part of the course:  V. C. Hamacher, Z. G. Vranesic, S. G. Zaky Computer Organization. McGraw-Hill, 1982

·         An introductory book about VHDL such as: VHDL Cook Book, Ref Manual  See also VHDL Archive

·         For the second part of the course:  Patterson Hennessy  Computer Organization Design, The Hardware/Software Interface. Morgan Kaufmann, 1998     Slides

·         Older course book for the first part of the course:  H. Taub  Digital Circuits and Microprocessors. McGraw-Hill, 1982


Course outline

 

Introduction
 

 An introduction to the course,

 What is it Computer Structure?

 The importance of Instruction sets

 Memory hierarchies
 Technological forces driving computer structure
 Silicon -> Transistors -> logical gates
 Implementing basic logical circuits from CMOS transistors

         

Representation of numbers

 

Binary, Octal and Hexadecimal number systems

Bases transfer of integers and fractions

The one's complement and two's complement

Representation of signed numbers

          Algebra of logical variables

Logical variables and functions
The OR, AND, NOT functions
Boolean Algebra Theorems
De'Morgan's Theorem
The XOR, NAND and NOR functions
Universal System
 

          Karnaugh Maps, Combinatorial Circuits


Simplification of Logical functions using Boolean Algebra Theorems
Simplification using Karnaugh Maps
Circuit implementation
The Don't care utility for function minimization

Introduction to VHDL      Tutorial    Ref Manual

 

Basic Logic Building Blocks (Mux, Decoder) 

 

  Decoders and Encoders (mux)

  Introduction to VHDL 

          Flip Flops

A latch with NAND gates
The need for latch and synchronization
Clocked FF
Truth table and timing diagram for a FF
Two phase clocking and the Master/Slave RS FF
The JK FF, D and T flip-flops
Shift registers 

  Registers, Counters, Simplification of Logical Functions

Serial to parallel
Parallel to serial
Serial implementation of a full adder
Counters and dividers
Ripple counter and a synchronous counter
Non-binary counters

 

  Sequential Circuits    (FSM)

               The state and transition diagrams
               Mealy circuits
               A sequence detector
               Elimination of redundant states

               Review VHDL
              

   The RISC Instruction Set and Assembly Language 

               The MIPS R2000 Assembly Language 

               Mips Intruction Set Architecture (ISA) Spec

               Instructions' representation in the computer
               Addressing modes
               Compiler, linker, loader
               RISC vs. CISC  

             Compiler, linker, loader
 

            Single Cycle Architecture 

                 Execution phases
                 Building a CPU from basic components
                 A simple implementation scheme: datapath and control
                 The problems of single cycle.
               

    Pipelined Architecture     

                Pipelined datapath
                Pipelined control
                Pipelined Architecture - Hazards detection and    resolution

      Nops and bubbles
                Forwarding
                Branch hazards
 

Special Lecture: Jan 24 at Dan-David 001 (10:00-13:00)

VLSI Trends in Micro architecture: Past, Present and Future

Dr. Uri Weiser

Intel Fellow and Chief Architect of MMX

See also: New Intel Chip (Jan 2006)

 

Supplementary material

          Multi Cycle Architecture    

                   Implementation
                   Control unit

          Multi-Cycle Control Unit

Flip-Flops review,

Finite State Machine Design, Moore and Mealy,

PLA, ROM

Microprogramming,  Exceptions and Interrupts
 

             

Past Exams

The following exams do not necessarily indicate what questions will be in this year exam. 

In addition or instead of the traditional questions there will be questions on

·         Transistors

·         VHDL

·         Related to the Intel lecture (or other possible guest lectures)

2004 A    2003 A  2003 B

Dec 18, 1998

Mar 17, 1999    Jun 30, 1999  (note corrections is Questions 1& 2)

Oct 13, 1999    Dec 17, 1999

 

Note that the material of the course has changed recently, so older exams (before 1998) do not reflect the full material of the course. The exams are in word 97 format.

Note that since last year VHDL has been added and is an integral part of the course.

 

  Additional material:

Advanced computer periferals

DSP Introduction

Components: 74xx TTL Family  Links  Software

CPU: Risc CPU Tech Sheets    History

WWW Computer Architecture Page 

 

Past guest talks:

Cache    

The Pentium(r) II/III Processor - Compiler on a Chip (PDF),

In this lecture we will give a brief overview of the ingredients of modern processor micro-architecture in general and will describe its usage in the Intel Pentium II/III processor family.  As time permits, we will discuss the aspects of power and energy in novel processors and will show how it is reflected in the new Intel Pentium M Processor.

Ronny Ronen is a Senior Principal Engineer/Researcher and the director of the Intel's Microprocessor Research Lab in Haifa, Israel, focusing on microarchitecture research.  Ronny was heavily involved in the definition stages of the Intel Pentium M processor.  He has been with Intel for 22 years.  Earlier in Intel he led the compiler and performance simulation activities in the Intel Israel Software department.  Ronny received his M.Sc. degree from the Technion, Israel Institute of Technology in 1979.  Modern Intel     Only relevant slides in Black & White version   and   Pentium M

Intel Prescott chip